The first computer in the house was my father’s. It was a TRS-80 Model 1. He had bought it to learn computing and because he realised computers were the future. I used it a lot learning to program in the BASIC language and then in Z80 assembly language (the language of the
microprocessor that ran the computer).

I was also interested in electronics (thanks to my Uncle who taught it in schools) and around the same time I saw an advertisement for the
Acorn Atom in an electronics magazine and I wanted one. I started saving but the BBC Microcomputer (“The Beeb”) came out before I could afford one. My Parents offered to help buy a Beeb by way of multiple combined Birthday and Christmas presents and the deal I would not use it until after my ‘O’ levels which I mainly complied with. I remember the excitement of going in to the store to purchase my Beeb.

I learnt to program that machine from top to bottom. I had the reference manuals and the data sheets for all the chips. I loved how you got the full circuit diagram with the Advanced User Guide (it was a print of the one hand drawn by Acorn). I learnt BBC BASIC and 6502 assembly language. I learnt how to add to the operating system and how to do clever things by directly programming the chips in the machine. It taught me a lot about programming, such as interrupts, concurrency, race conditions, dead and live locks, and so on. Programming did become my first love and superseded electronics but I wouldn’t be the programmer I am today with out it!

I didn’t just program. I did play games with my favourites being Chuckie Egg and Elite! Elite was a complete time sink. No game following sucked me in as much as Elite did until World of Warcraft!

I didn’t completely give up on electronics and would develope small projects to connect to my Beeb. In the mid 80s I was studying for a Physics degree and naturally I used my Beeb. My final year project was based around the automation of an experiment. I designed hardware to drive the equipment, sensors and hardware to read data, and wrote software to drive it all from a Beeb.

In 1989 I got an Acorn A3000. It was the successor to the Beeb and also used in schools. It had the Acorn designed ARM processor (now used in nearly everything from a mobile phone to the iPad, set top boxes and televisions), what seemed like copious amounts of memory, loads of colours and a built in disk drive. It had BBC BASIC so I was at home and also taught me to program ARM assembly language (which I still use today). So the Beeb was basically retired.

I moved on to other machines, developing for Linux, higher degrees and becoming a research assistant but I never lost my love of my Beeb though and I still own mine almost 30 years after I bought it. I also still make projects for it. The most recent being an ethernet interface so that I can connect it to the internet.

I am now an embedded software consultant and I work for a company that was formed by employees of the company that bought Acorn Computers when it finally ended in 1999. My most recent project was optimising Linux on a device with an ARM processor. And my entire career is down to me and my Parents buying that Beeb 30 years ago!

I have created a new site http://projects.cyberspice.org.uk/ which contains all the details of these projects. Over the next few days I will be updating it with the details of Beebthernet, my programmable earrings and so on. Each of the projects will be described in detail and links to software and schematic downloads provided.

The first documented project is my ethernet for a BBC Microcomputer project known as Beebthernet.

The new schematic is below as is the almost completed interface. The LEDs and their resistors are not on the board. Clicking on an image will take you to the Flickr page where many of the images are annotated.

Unfortunately it doesn’t work. I can read data fine but I can’t write data. I looked at the bus and the data is getting to the module so I re-checked the timings. Normally peripherals are slower than the devices trying to read them so the issue is slowing the processor or bus down. However this is a modern peripheral and at least a 30 year old processor design. The timing specification for a 2MHz 6502 says that the data bus will be stable ay a minimum of 110ns after the clock E2 goes high. Since reads and writes are made when E2 is high the /RD and /WR lines, which are generated from E2 and the R/W line, will go low sooner than that. The specification for the WIZ812MJ says that the maximum time take for the data lines to stabilize is 18ns. I.e. the data bus doesn’t stabilize in time. I need to work out a way of delaying the write line signal change by 100ns.

So I then knocked up an SPI version of the interface on breadboard and connected it to the User IO port, which is connected to port B of the 6522 VIA, on the BBC Micro. I wrote a bit banging routine to read and write to the WIZ810MJ in SPI mode which, although is the slowest mode available, will work what ever the speed of the IO. It worked! I managed to set the MAC address and interface, netmask and gateway IP addresses and pinged the device from my MacBook. The breadboard set up and results of the ping test are below. Again the images are annotated on Flickr.

Interfacing the device was a no brainer as the BBC Micro has the ‘User Port’ which is a parallel port comprising 8 data lines and 2 control lines accessable via a 20 way IDC connector under the keyboard. The ‘User Port’ is actually Port B of one of the two 6522 VIA IO chips in the machine. To simplify the code the device was wired as follows:

• Bit 7 – MISO (Input data from the slave to the computer)
• Bit 6 – MOSI (Output data from the computer to the slave)
• Bit 1 – SCS (Output slave chip select)
• Bit 0 – SCLK (Output SPI clock)

The two registers of the VIA which are of interest are register 0, the input/output data register for Port B, and register 2 which is the direction register. Setting a bit in register 2 means that the corresponding bit in register 0 is an input and clearing the bit means its an output. Writing to register 0 will latch data to be output on Port B. Reading from register 0 will return the value of the lines on Port B. Usefully reading register 0 will return the values of output bits, set on a previous write, as well as the input bits. The code below uses this feature too.

spibyte:
	sta outb
	ldy #0
	sty inb
	ldx #8
spibytelp:
	tya		; (2) set A to 0
	asl outb	; (5) shift MSB in to carry
	bcc spibyte1	; (2)
	ora #mosi	; (2) set MOSI if MSB set
spibyte1:
	sta uservia	; (4) output (MOSI, SCS low, SCLK low)
	tya		; (2) set A to 0 (Do it here for delay reasons)
	inc uservia	; (6) toggle clock high (SCLK is bit 0)
	clc		; (2) clear C (Not affected by bit)
	bit uservia	; (4) copy MISO (bit 7) in to N (and MOSI in to V)
	bpl spibyte2	; (2)
	sec		; (2) set C is MISO bit is set (i.e. N)
spibyte2:
	rol inb		; (5) copy C (i.e. MISO bit) in to bit 0 of result
	dec uservia	; (6) toggle clock low (SCLK is bit 0)
	dex		; (2) next bit
	bne spibytelp	; (2) loop
	lda inb		; get result
	rts

The routine above is called with A containing the byte to be written on to the SPI. When it returns A contains the byte read from the SPI. outb and inb are page zero locations to store the byte being written and the byte being read and uservia is the address of register 0 on the VIA. It is assumed that register 2 is already pre-configured (which is likely when sending/receiving multiple bytes).

The routine starts by setting Y is set 0 (and the input byte zeroed) and X is set to the number of bits to send i.e. 8. Then the loop begins. The accumulator is set to 0 (by copying the value of Y into it). The MSB of the output byte is shifted in to Carry, and if set, the MOSI output bit (bit 6) is set in A. A is then stored in register 0 (to output the MOSI bit). The accumulator is set to 0 again. This instruction also provides 2 cycles in which the MOSI bit can stabilize before the clock is toggled. The clock is toggled by incrementing register 0 of the VIA. This will read the value, add one to it (i.e. set the bottom bit), and write it back again. As I said earlier, reading returns the latched value of the output bits so, apart from the clock bit, no other bits will change.

The Carry is cleared in preparation for the next step. Again this instruction is done here to provide a 2 cycle delay as well. The BIT instruction is then used to compare the accumulator with the value on the IO port. BIT logically ANDs the accumulator and the specified memory setting the Z flag is equal but throwing away the result. However it also copies bit 7 and bit 6 in to the N and V processor flags respectively. Since bit 7 of the IO port is MISO this instruction reads the value on the MISO line and puts it in to N. If N is not clear (i.e. the bit is 1) the Carry flag is set. The Carry flag is then shifted in to the LSB of the output byte and the clock toggled back low again by decrementing the register 0 value.

This loop is repeated 8 times for all 8 bits. By the end the 8 bits of the output byte will have been output MSB first and the 8 bits of the input byte read in MSB first. SCLK is not very symmetrical and this may cause issues. If that is the case additional NOPs either side of the inc uservia instruction may help.

The VIA also contains a shift register and I will be looking in to whether it could be used to speed up the bus.

I was having problems because the WIZ810mj module I was intending to use has 2mm board to board connectors on it. This isn’t very hobbyist friendly. However I discovered very recently that there’s a variation of the module, the WIZ812mj which actually has 0.1″ pitch board to board connectors on it. This is great because it means I can use stripboard for construction. The WIZ810mj I already have wont be wasted and I will be writing about what I am doing with that soon.

The other piece of information which has helped is discovery of a third way of using the WIZ module. The module can be direct bus accessed or used via an SPI bus. Since the clock speed of a BBC micro is relatively slow I ruled out the SPI bus (which is typically used by microcontrollers) and decided to bus access the module. The addressed interface has a 32KB memory map. This meant I was going to have to implement some paging logic in order to fit it in to the 6502‘s address space and so complicated the design. But then I discovered it supported a third access mode which requires a minimal address space. The third method is an indirect bus mode and uses the registers at 0×0001 and 0×0002 as an indirection address. You set the address of the location you want to read or write in the WIZ module in these registers and then you can read or write the value by reading or writing the register at 0×0003. This means it requires far less space in the 6502 memory map so I can use one the Beeb’s external IO ports.

The schematic above shows the design of the ethernet board. The board is designed to be connected to the BBC Micro’s TUBE interface. This interface provides access to the 6502′s data bus; A0 to A6 of the address bus; a select line; the 2Mhz clock; the read/write line; the IRQ line and the reset line. This is all I need to drive the WIZ module. There are a couple of bus-transceiver chips to buffer the module which is actually a 5v signal tolerant 3v3 device. A small amount of TTL logic to provide /RD and /WR lines required by the ethernet module. And the link, transmit and receive signals are broken out to LEDs. The schematic does not show the derivation of the 3v3 supply nor decoupling capacitors for the ICs. There’s also a small bug in so much as the A2 line is hooked through to the WIZ module. Its not needed and should be tied low.

So that’s the design. I have all the parts and will be prototyping it this weekend on stripboard. Watch this space!

Writing about my Beeb yesterday got me thinking about a project I consider every now and then and that is adding an ethernet adapter to my Beeb.

When I first thought about this I was working on a driver for a small embedded ethernet chip that was destined for a set top box. The chip was pretty simple and could be used on an 8 or 16 bit data bus. It could have been interfaced to my Beeb relatively easily but would have required me to write a whole TCP/IP stack for the machine. Something I could have done but not a quick task. Also you’d need memory buffers to build the packets in which, in a memory starved machine, are a costly overhead. Work got busier and I had more important things to do with my free time so I put the idea to bed.

I started thinking about the project again after reading about a chip that communicated using SPI. It was intended to be used with micro-controllers so seemed more suited to my needs. Except there were two issues. Firstly a BBC Micro doesn’t have SPI. In theory the 6522 VIA, of which there are two in the Beeb, can do SPI like IO. Unfortunately there’s actually a bug in the chip that means it doesn’t work properly. So either I would have to bit bang or I would have to use a second chip, probably a micro-controller, to communicate with the ethernet chip and the BBC Micro would interface with the micro-controller. Again other things became a priority and it got forgotten about.

So today I started thinking about it again. As more and more devices have become internet enabled some neat chips have been released. These chips have built in micro-controllers which have a TCP/IP stack built in. They do all the hard work. So I started Googling and I found this article on the W5100 which seems to be ideal. Specifically the W5100 is a fully hardwired TCP/IP stack with support for TCP, UDP, ICMP, IPv4 ARP, IGMP, PPPoE protocols. Features include 10BaseT/100BaseTX Ethernet MAC/PHY embedded support and ADSL connection (with PPPoE Protocol with PAP/CHAP Authentication mode). You can interface with it using a parallel data bus and it basically provides a socket level interface at the software level. Set up the MAC address, IP address and gateway address and you can ping the chip with no further work from the host machine.

The W5100 comes in quite a small package. Circuit board technology has come a long way since I last built anything complicated. To solder most modern packages is beyond the of the average amateur electronics engineer due pin density or the requirement for solder ovens or flow technologies. This could have put a damper on this project except I found the WIZ810MJ module. Its basically the W5100 chip on a pre built module. It seems perfect so I’m getting one.

I will need to provide a 3.3v supply but this can be relatively simply provided with a small regulator chip from the 5v supply of the Beeb. The IO on the module is 5v tolerant so it can be interfaced with directly. The module has an 8 bit data bus and address lines A0-A14, i.e. 32KB of address space. The Beeb supports Sideways ROMs, basically paged ROMs which occupy the same address space. These are 16KB in size so I intend utilizing this together with a latch to bank the address space in to two banks. The remaining IO lines can be supported relatively easily.

So this is my first mad project. Watch this space!